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IBM claims advance in silicon photonics packaging

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Scientists at IBM Research have demonstrated what may be an important step towards the next generation of computing and data centre interconnect technology. The team established a method to integrate silicon photonic chips with the processor in the same package, avoiding the need for optical transceiver assemblies.

The new technique, which was presented on 25 March at this year's OFC in Los Angeles, California, could lower the cost and increase the performance, energy efficiency and size of future data centres, supercomputers and cloud-based systems.

Photonic devices offer many advantages compared to traditional electronic links found in today’s computers, as optical links can transmit more information over larger distances and are more energy efficient than copper-based links.

To benefit from this technology, a tight integration of the electrical logic and optical transmission functions is required. The optical chip needs to be as close to the electrical chip as possible to minimise the distance of electrical connection between them; this can best be accomplished if they are packaged together.

Optical interconnect technology is currently incorporated into data centres by attaching discrete transceivers or active optical cables, which come in pre-assembled building blocks. The pre-packaged transceivers are relatively large and expensive, limiting their large-scale use. Furthermore, such transceivers are mounted at the edge of the board, resulting in a large distance between the processor chip and the optical components.

IBM researchers from Europe, the United States and Japan instead proposed an integration scheme in which the silicon photonic chips are treated similarly to ordinary silicon processor chips and are directly attached to the processor package without pre-assembling them into standard transceiver housings. This improves the performance and power efficiency of the optical interconnects while reducing the cost of assembly.

The team demonstrated efficient optical coupling of an array of silicon waveguides to a substrate containing an array of polymer waveguides. Challenges arise because alignment tolerances in photonics are critical (sub-micron range) and optical interfaces are sensitive to debris and imperfections. Another challenge arose from the significant size difference between the silicon waveguides and the polymer waveguides originally presented. The researchers overcame these obstacles by gradually tapering the silicon waveguide, leading to an efficient transfer of the optical signal to the polymer waveguide.

The method is scalable and enables the simultaneous interfacing of multiple optical connections between a silicon photonic chip and the system. The optical coupling is also wavelength and polarisation insensitive, and tolerant to alignment offsets of a few micrometres.

“This integration scheme has the potential to massively reduce the cost of applying silicon photonics optical interconnects in computing systems,” said Bert Offrein, manager of the photonics group at IBM Research-Zurich. Cheaper photonic technology enables its deployment at a large scale, which will lead to computing systems that can process more information at higher performance levels and with better energy efficiency, he explained.

“Such systems will be key for future applications in the field of cloud-computing, big data, analytics and cognitive computing. In addition, it will enable novel architectures requiring high communication bandwidth, as for example in disaggregated systems,” Offrein added.

This story originally appeared on our sister website


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