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The 400G-per-lane reckoning: Polariton ships plasmonic modulator samples

Polariton plasmonic modulator 400G lane

Polariton Technologies has shipped its first high-speed silicon photonics transmit chips incorporating proprietary plasmonic modulator technology to three leading transceiver manufacturers (Credit: Polariton Technologies)

Polariton Technologies has shipped its first high-speed silicon photonics transmit chips incorporating proprietary plasmonic modulator technology to three leading transceiver manufacturers. The move signals the start of commercial evaluation for a technology capable of scaling data rates to 400G per-lane and beyond.

AI clusters and hyperscale connectivity

The sample shipments target AI cluster connectivity and hyperscale environments, where operators are facing a "power wall" that traditional silicon photonics can struggle to overcome. By integrating plasmonics into standard 200mm silicon photonics platforms, specifically imec’s iSiPP200, Polariton has demonstrated that its ultra-high-speed devices are now compatible with high-volume semiconductor supply chains.

Claudia Hoessbacher, CEO of Polariton says: "Delivering samples to industry leaders is the best market proof we can think of. The devices are inherently capable of supporting 400G per lane operation, and customers are now integrating Polariton's chips across their ecosystem."

The road to 3.2T and CPO

The current industry focus is on 1.6T transceivers, but the roadmap to 3.2T requires a shift to 200G and 400G per-lane intensity modulation (IM-DD). Polariton’s plasmonic ring resonator modulators (RRMs) offer a compelling solution, with an electro-optic bandwidth exceeding 110 GHz and a footprint significantly smaller than conventional components.

Crucially, these plasmonic devices use the metal of the waveguide as their own electrical contact, resulting in ultra-low capacitance and power dissipation. For a 400G lane, Polariton targets a power budget of less than 0.5 pJ/bit, a metric that could prove decisive for the adoption of Co-Packaged Optics (CPO).

Overcoming the "integration gap"

Historically, plasmonic technology faced scepticism regarding its CMOS compatibility and optical loss. However, recent collaborations with research partner ETH Zurich have achieved experimental data rates in excess of 400 Gbit/s per-lane with device losses in the range of best-in-class traditional modulators (1.2 dB).

Polariton plans to showcase its commercial-ready devices at OFC 2026 in Los Angeles (Booth 125), where the company will participate in high-level panels regarding the future of 400G-per-lane signalling.
 

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