Thanks for visiting Fibre Systems.

You're trying to access an editorial feature that is only available to logged in, registered users of Fibre Systems. Registering is completely free, so why not sign up with us?

By registering, as well as being able to browse all content on the site without further interruption, you'll also have the option to receive our magazine (multiple times a year) and our email newsletters.

Photonics researchers make one chip to rule them all

Share this on social media:

A multifunctional silicon photonics integrated circuit that can be programmed to perform a variety of different functions has been developed by researchers from Spain and the UK.

This is “the first photonic integrated chip that enables multiple functionalities by employing a single common architecture”, according to researchers from the Silicon Photonics Group at the Optoelectronics Research Centre (ORC), University of Southampton, and from the Institute of Telecommunications and Multimedia Applications (iTEAM) at the Universitat Politècnica de València,

The team’s results have been published in the journal Nature Communications.

The chip’s operation is inspired by field programmable gate arrays (FPGAs), which use a common hardware architecture with logic blocks that can be configured to perform the desired operations.

Instead of logic blocks, the optical chip employs tunable couplers (3dB Mach-Zehnder interferometers with phase control) connected by waveguides in a honeycomb mesh configuration. Light sources and detectors are included in other areas of the chip.

By programming the internal connections, the chip can be configured to perform different functionalities, to address a variety of applications using photonics, from biophotonics sensors to optical communications devices.

The main advantage of this approach is that the physical hardware architecture is manufactured independently from the targeted functionality to be performed, which reduces design cost, fabrication and testing iterations.

The chip was designed by both teams, fabricated in the Southampton Nanofabrication Centre by the members of the Silicon Photonics Group, and characterised by the València team.

Once designed and tested, the chip enables the configuration of more than 100 photonic signal processing circuits, of which around 30 configurations have been demonstrated by the team, which they claim is the highest number reported to date.

Lead researcher of the València Group, Professor José Capmany, said: “This represents a paradigm shift in the field of integrated photonics, from application specific photonic integrated circuits to generic purpose and programmable devices, in the same way as the success experienced by the electronic field in the ‘80s.”

The work was a genuinely collaborative affair, the universities said, with PhD student Daniel Perez from the València group, spending time in Southampton during his PhD project, working with the design and fabrication teams, and in particular with Dr David Thomson, Dr Li Ke and Dr Ali Khokhar.

The chip was fabricated within the framework of the Cornerstone project, which offers multi-project wafer runs on different materials platforms to researchers in the UK and abroad.

 

Journal reference

Daniel Pérez et al. ‘Multipurpose silicon photonics signal processor core’, Nature Communications 8, 636 (2017), doi:10.1038/s41467-017-00714-1. doi:10.1038/s41467-017-00714-1

Company: 

Related news

Recent News

01 June 2020

A team of researchers from RMIT, Monash and Swinburne universities in Australia, has achieved a data speed of 44.2Tb/s from a single light source.

14 May 2020

Deutsche Telekom Global Carrier, the international wholesale unit of Deutsche Telekom, has turned up its European 800G network, connecting its data centres in Vienna.

23 March 2020

Researchers at the Zepler Institute for Photonics and Nanoelectronics at the University of Southampton have demonstrated significantly improved hollow-core fibre performance.

02 March 2020

Broadband Forum has wrapped up the development of two new standards for 5G as part of its promise to rapidly support the 3GPP release cycles.