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HiLight releases 11.3G CMOS TIA optimised for APDs

HiLight Semiconductor has announced the production release of the HLR10G1, a 11.3Gb/s CMOS transimpedance amplifier (TIA) designed to provide best-in-class sensitivity when used with 10Gb/s avalanche photodiodes (APDs).

Manufactured on 12-inch wafers, the HLR10G1 is ideally positioned to meet the high-volume, low-cost, high-performance requirements of the 10G PON market, which should start to ramp in 2017, the company contends.

The HLR10G1 can be paired with HiLight’s 10G CMOS ‘Combo’ ICs to create a complete chipset for 10G PON optical networking units (ONUs). Combo chips contain an embedded microcontroller that enables them to operate with different PON generations and standards.

The HLR10G1 is optimised for use with a wide range of 10Gb/s APDs, limiting amplifiers and 10G-PON Combos. The device features a 2-bit bandwidth-adjust function to optimise TIA performance with different manufacturers’ APDs. Measured sensitivities greater than -33dBm have been achieved at bit error rates (BERs) of 1E-3, and up to -28dBm at BERs of 1E-12, across multiple APDs commercially available in the market.

The device also features low power consumption (24mA with single 3.3V supply) and a compact die size to enable simple integration into low cost, high-volume optical receiver assemblies.

“At HiLight we are using CMOS technology to deliver high-performance yet cost-effective solutions to meet the economies of scale that the 10G-PON market requires. Our team has significant experience in this market having successfully deployed high-volume CMOS EPON and GPON chipsets previously, so we’re very excited to be enabling the 10G-PON market with a fully CMOS chipset solution,” said Christian Rookes, vice president of marketing at HiLight.

HiLight provides a complete support package for all its products, including reference designs, evaluation boards and full documentation.


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